Architectural Analysis of Cryptographic Applications for Network Processors

Network processors are application specific programmable processors and will become critical components of next-generation networking equipment. As Internet expands exponentially, the need for secure communication increases very quickly. The performance of communication applications including packet processing and cryptographic applications on network processors thus becomes an important issue of network processor system design. In this paper, we compare and analyze the architectural characteristics of many widespread cryptographic algorithms and their implementations through simulation on a MIPS-like architecture. We find that the instruction mix is different from SPEC95 programs; and that the average size of basic blocks is 2~3 times larger than that of common applications. Only 7% of instructions are conditional branches and most of them are taken. Most of the cryptographic applications have an ILP of 8. Most of the applications have small kernels of less than 16KB. Memory system has much less important effect on the overall performance. We find that only a small direct-map instruction cache and data cache are needed to achieve comparable performance. Cache replacement strategy is not important to the overall performance. The results in this paper are helpful to the design of network processors.